界: Time and State
分布式计算是关于时间和状态的。也就是说,为了让多个组件相互通信,必须共享状态,所有这些都需要时间。
大多数程序员都会将其工作拟人化。他们会让一个控制线程以同样的方式(他们必须自己完成工作时采取的方式)执行整个程序。然而,现代计算机不同任务之间切换得非常快,在多核、多 CPU 或分布式系统中,两个事件可能完全同时发生。程序员预期的程序执行过程与实际情况之间存在差距,即存在缺陷。这些缺陷与线程、流程、时间和信息之间的意外交互有关。这些交互是通过共享状态发生的:信号量、变量、文件系统,以及总而言之,可以存储信息的任何内容。
Race Condition: Signal Handling
Abstract
为多重信号安装相同的信号处理函数的话,当在短时间内连续收到不同的信号时,会导致 race condition。
Explanation
当安装作为信号处理函数的函数属于非可重入函数时,信号处理就会发生 race condition。非可重入函数会保留一些内部状态,或调用其他同样如此的函数。当安装同一函数去处理多重信号时,很有可能发生这种 race condition。
信号处理 race condition 很有可能在以下情况中出现:
1. 程序为多重信号仅安装一个信号处理函数。
2. 在短时间内,信号处理函数收到两种不同的信号,导致该信号处理函数中出现 race condition。
示例:以下代码为两个不同的信号仅安装了一个简单的、非折返信号处理函数。如果攻击者使信号在适当的时间内一起发送,信号处理函数就会遭受 double free 漏洞威胁。针对同一个值两次调用
信号处理 race condition 很有可能在以下情况中出现:
1. 程序为多重信号仅安装一个信号处理函数。
2. 在短时间内,信号处理函数收到两种不同的信号,导致该信号处理函数中出现 race condition。
示例:以下代码为两个不同的信号仅安装了一个简单的、非折返信号处理函数。如果攻击者使信号在适当的时间内一起发送,信号处理函数就会遭受 double free 漏洞威胁。针对同一个值两次调用
free()
,会导致 buffer overflow。当程序使用同一参数两次调用 free()
时,程序中的内存管理数据结构会遭到破坏。这种破坏会导致程序崩溃。有时在某些情况下,还会导致两次调用 malloc()
延迟,而返回相同的指针。如果 malloc()
两次都返回同一个值,稍候程序便会允许攻击者控制整个已经写入双倍分配内存的数据,从而使程序更加容易受到 buffer overflow 的攻击。
void sh(int dummy) {
...
free(global2);
free(global1);
...
}
int main(int argc,char* argv[]) {
...
signal(SIGHUP,sh);
signal(SIGTERM,sh);
...
}
References
[1] Standards Mapping - CIS Azure Kubernetes Service Benchmark 1.0
[2] Standards Mapping - CIS Microsoft Azure Foundations Benchmark partial
[3] Standards Mapping - CIS Amazon Elastic Kubernetes Service Benchmark 2.0
[4] Standards Mapping - CIS Amazon Web Services Foundations Benchmark 4
[5] Standards Mapping - CIS Google Kubernetes Engine Benchmark normal
[6] Standards Mapping - Common Weakness Enumeration CWE ID 362, CWE ID 364
[7] Standards Mapping - Common Weakness Enumeration Top 25 2022 [22] CWE ID 362
[8] Standards Mapping - Common Weakness Enumeration Top 25 2023 [21] CWE ID 362
[9] Standards Mapping - DISA Control Correlation Identifier Version 2 CCI-000366, CCI-003178
[10] Standards Mapping - General Data Protection Regulation (GDPR) Indirect Access to Sensitive Data
[11] Standards Mapping - Motor Industry Software Reliability Association (MISRA) C Guidelines 2012 Rule 21.5
[12] Standards Mapping - Motor Industry Software Reliability Association (MISRA) C++ Guidelines 2008 Rule 18-7-1
[13] Standards Mapping - NIST Special Publication 800-53 Revision 4 CM-6 Configuration Settings (P1)
[14] Standards Mapping - NIST Special Publication 800-53 Revision 5 CM-6 Configuration Settings
[15] Standards Mapping - OWASP Top 10 2021 A04 Insecure Design
[16] Standards Mapping - OWASP Application Security Verification Standard 4.0 1.11.2 Business Logic Architectural Requirements (L2 L3)
[17] Standards Mapping - Payment Card Industry Data Security Standard Version 3.0 Requirement 6.5.6
[18] Standards Mapping - Payment Card Industry Data Security Standard Version 3.1 Requirement 6.5.6
[19] Standards Mapping - Payment Card Industry Data Security Standard Version 3.2 Requirement 6.5.6
[20] Standards Mapping - Payment Card Industry Data Security Standard Version 3.2.1 Requirement 6.5.6
[21] Standards Mapping - Payment Card Industry Data Security Standard Version 4.0 Requirement 6.2.4
[22] Standards Mapping - Payment Card Industry Software Security Framework 1.0 Control Objective 4.2 - Critical Asset Protection
[23] Standards Mapping - Payment Card Industry Software Security Framework 1.1 Control Objective 4.2 - Critical Asset Protection, Control Objective B.3.3 - Terminal Software Attack Mitigation
[24] Standards Mapping - Payment Card Industry Software Security Framework 1.2 Control Objective 4.2 - Critical Asset Protection, Control Objective B.3.3 - Terminal Software Attack Mitigation
[25] Standards Mapping - SANS Top 25 2009 Insecure Interaction - CWE ID 362
[26] Standards Mapping - SANS Top 25 2010 Insecure Interaction - CWE ID 362
[27] Standards Mapping - Security Technical Implementation Guide Version 3.1 APP3630.1 CAT II
[28] Standards Mapping - Security Technical Implementation Guide Version 3.4 APP3630.1 CAT II
[29] Standards Mapping - Security Technical Implementation Guide Version 3.5 APP3630.1 CAT II
[30] Standards Mapping - Security Technical Implementation Guide Version 3.6 APP3630.1 CAT II
[31] Standards Mapping - Security Technical Implementation Guide Version 3.7 APP3630.1 CAT II
[32] Standards Mapping - Security Technical Implementation Guide Version 3.9 APP3630.1 CAT II
[33] Standards Mapping - Security Technical Implementation Guide Version 3.10 APP3630.1 CAT II
[34] Standards Mapping - Security Technical Implementation Guide Version 4.1 APSC-DV-001995 CAT II
[35] Standards Mapping - Security Technical Implementation Guide Version 4.2 APSC-DV-001995 CAT II
[36] Standards Mapping - Security Technical Implementation Guide Version 4.3 APSC-DV-001995 CAT II
[37] Standards Mapping - Security Technical Implementation Guide Version 4.4 APSC-DV-001995 CAT II
[38] Standards Mapping - Security Technical Implementation Guide Version 4.5 APSC-DV-001995 CAT II
[39] Standards Mapping - Security Technical Implementation Guide Version 4.6 APSC-DV-001995 CAT II
[40] Standards Mapping - Security Technical Implementation Guide Version 4.7 APSC-DV-001995 CAT II
[41] Standards Mapping - Security Technical Implementation Guide Version 4.8 APSC-DV-001995 CAT II
[42] Standards Mapping - Security Technical Implementation Guide Version 4.9 APSC-DV-001995 CAT II
[43] Standards Mapping - Security Technical Implementation Guide Version 4.10 APSC-DV-001995 CAT II
[44] Standards Mapping - Security Technical Implementation Guide Version 4.11 APSC-DV-001995 CAT II
[45] Standards Mapping - Security Technical Implementation Guide Version 5.1 APSC-DV-001995 CAT II
[46] Standards Mapping - Security Technical Implementation Guide Version 5.2 APSC-DV-001995 CAT II
[47] Standards Mapping - Security Technical Implementation Guide Version 5.3 APSC-DV-001995 CAT II
desc.structural.cpp.race_condition_signal_handling